RISC vs. CISC: Characteristics, Pros & Cons

Lesson Transcript
Instructor: Lyna Griffin

Lyna has tutored undergraduate Information Management Systems and Database Development. She has a Bachelor's degree in Electrical Engineering and a Masters degree in Information Technology.

In this lesson we will examine what RISC and CISC processors are. We will understand their characteristics and highlight their advantages and disadvantages and then you can test your knowledge with a quiz! Updated: 08/17/2020

What Is RISC?

Reduction Instruction Set Computer (RISC) is a multiprocessor particularly designed to process limited computer instructions in order to operate at a much higher speed. On any given system, there are many programs and many instructions being executed. It was discovered that only 10% of all instructions were frequently executed, and that the other 90% clogged the pipeline, thus contributing to the system slowness.

In fact, in order to deal with the increase in cycles, every added instruction meant the introduction of many more transistors in the manufacturing process. To combat this, the RISC architecture only executes the most frequently used instructions. This then speeds up the instruction pipeline, leading to faster execution of instructions in a single cycle. This, in turn, speeds up the processing time.

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  • 0:04 What Is RISC?
  • 0:54 RISC Characteristics
  • 3:02 What Is CISC?
  • 3:24 CISC Characteristics
  • 4:28 RISC & CISC: Pros & Cons
  • 5:33 Lesson Summary
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RISC Characteristics

Let's take a closer look at some of the characteristics of RISC one at a time.

1. Small and Limited Numbers of Instructions

As explained earlier, to increase the speed and performance of RISC, a limited number of frequently used instructions are executed. This reduces the number of cycles per instruction but at a cost of total number of instructions executed in the same time frame.

2. Hardwired Control Units

Hardwired control units are fixed logic circuits for control, signal generation, and interpretation of instruction sets. RISC use these hardwired control units in its design structure to execute instructions. This leads to better performance and faster processing, but the implementation is not very flexible.

3. High Performance With Decreased Power

RISC processors achieve high throughput but use less power. This is achieved when processor resources are heavily pipelined and using their full potential.

4. Simple Instructions

RISC instructions are simple and always consistent. Because of this simplicity, more instructions can be executed in one cycle.

5. Simple Addressing Modes

Addressing modes refer to the locations of the data within the instruction set that is to be executed. Some processors support many different types of addressing modes. The addressing modes employed by RISC, however, are simple and do not use memory references.

6. Uniform Fixed Length Instruction Set

Data can be stored in 2 ways:

  1. inside the instruction, or
  2. in the register.

When data is stored in the instruction, the length of the addressing mode may vary accordingly. As discussed above, RISC employs simple addressing modes, characterized by uniform and fixed-length instruction sets. Thus, in the case of RISC, data is stored in the registries, which are fixed length.

7. Large Number of Registers

There is minimal interaction with memory with RISC. Instead, RISC uses a large number of registers to execute its instructions. This frees up memory for other purposes.

What Is CISC?

Unlike the RISC model, Complex Instruction Set Computer (CISC) is a processor which is developed with a full (i.e. complex) set of instructions. The aim with this full instruction set is to provide the full processor capacity in the most efficient manner. RISC models proved, however, that better efficiency was achieved by reducing the set of instructions.

CISC Characteristics

Now let's take a closer look at CISC's different characteristics.

1. Complex Instructions

Instructions executed with CISC are complex and demand more memory references. This adversely affects overall system performance.

2. Varying Types of Processor Instructions

The complexity of the instructions used by CISC requires assembly code (high level language coding) in its execution.

3. Complex Addressing Modes

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